2nd Internal Conference on Computer Architecture (ICCA'2000)
Sala Mestrado Informática, Dep. Inf., Univ. Minho
Campus Gualtar, BRAGA
Instructions for authors
(last updated: 12-Jan-00, 09:00)
Editor: Alberto José Proença (Editor's Message)
Session 1
Novel Approaches to RISC Processor Architectures
Chairman: João Miguel Fernandes
9h00m - Biochips in Computing (11-BioComp.zip)
António Augusto da Costa Salgado
Abstract: Over the years biology has been providing the best computational models to implement next generation computing systems. This communication addresses the biological behaviours that are best suited for computing implementation, and how data is processed in biological systems. The communication closes suggesting directions where molecular computing can have an impact.
9h15m - Support for efficient Stack Oriented Computing Architecture (12-StackArch.zip)
Bruno da Conceição Cortes
Abstract: This communications addresses the current state of the art on stack architecture, showing the negative impact that subroutine calls and recursive programming can have on performance. The presented topics include an overview of currently available solutions on stack design, on frame registers mapping strategies, and on stack-based compiling models. Some commercial and successful implementations of stack architectures complement the views presented earlier. The future of stack computers, the aliasing of registers and memory usage, the conditional subroutine return instructions and the code support on stack operations, are final issues requiring further investigation.
9h30m - Extending Instruction Sets (cancelled)
Mário Miguel Machado
9h45m - CISC Implementation on RISC Architectures (14-CISC-RISC.zip)
Orlando Dias
Abstract: CISC and RISC (Complex and Reduced Instruction Set Computer, respectively) are dominant processor architecture paradigms. Computers of the two types are differentiated by the nature of the data processing instructions sets interpreted by their central processing units (CPUs). Both have advantages and drawbacks, which are revisited in this communication. Independently of the processor architecture, the exploitation of instruction-level parallelism by superscalar architectures have been requiring speculative execution. This communication also attempts to focus these parallelism issues and presents a case study of a well known CISC processor (Intel P6).
Session 2
Application Specific CPU Architectures
Chairman: Luís Paulo Santos
10h00m - From Embedded Processor to High Performance CPU's (cancelled)
Jorge Manuel de Sousa Moreira
10h15m - Adapting Processors to Electronic Games (cancelled)
Luís Leal
10h30m - Intelligent Electronic Systems: from Buttons to ID-Cards (23-Buttons.zip)
João Carlos Cardoso da Silva
Abstract: Intelligent electronic systems can be downsized to hardware devices with an embedded microcomputer chip, integrating CPU, memory and the required I/O and/or communication circuits. The basic architectural trends behind some of the current "tiny computers" are highlighted, introducing the reader into two types of innovative systems that are commercially available: "intelligent/memory" buttons and identification "smart" cards.
10h45m - Architectures to Support Speech Recognition and Synthesis (24-ArchSpeech.zip)
Óscar Sílvio Gama
Abstract:Speech technologies will soon become a common place in our society. To have an insight into its actual state-of-art, this communication starts to address the architecture of a typical modern speech system. Then the main technical and user problems that such technologies actually involve are stressed. It will also be shown how alternative architecture implementations can enhance the overall performance of such systems. Finally, a description of a speech processor architecture in embedded applications is presented as a case study.
11h00m - Configurable Computing at CPU level (25-ConfigComp.zip)
Francisco Duarte
Abstract: One of the most compelling issues in microprocessor architectures is the Configurable Hardware. This approach brings new perspectives on the way computing may be seen. Hardware that can be modified on the fly has implicit capacities that surpass traditional computing systems. This communication presents and analyses the applicability scope of the most relevant configurable computing architecture proposals and their implementations, and their integration into computing systems.
Session 3
Scalable Architectures
Chairman: António Manuel Pina
9h00m - Dynamic Web Server Benchmarking (31-BenchWeb.zip)
Sílvia Cunha
Abstract: Dynamic web servers typically rely on a combination of an HTTP server with a database server, to keep enterprise information resources. This communication addresses benchmarks for dynamic web servers, and the situations and problems that may occur when benchmarking those servers. Current benchmarks are surveyed, with further development on SPEC and TPC methodologies to address the benchmarking issue.
9h15m - Parallel Architecture Evaluation for Genetic and Evolutionary Algorithms (32-ParGenEvol.zip)
Carla Isabel Vilela
Abstract:Evolutionary and genetic algorithms have been gaining increased attention in the past few years due to their versatility, and they are being successfully applied in several different fields of study. This communication aims to analyse some parallel genetic and evolutionary algorithms implementations on parallel computer systems; among these implementations, this communication focuses the coarse-grain, fine-grain and master-slave models.
9h30m - GIS Computer Architectures - 3D and Stereoscopic Vision (33-GISarch.zip)
António Morais
Abstract: Geographical Information Systems (GIS) have been widely improved during past years. This communication takes a closer look on hardware technologies required to extract and to produce adequate cartographic data, namely those issues concerning the 3D and stereoscopic vision. Firstly it presents different ways to represent data in GIS, namely the vector and raster models. It then shows how to get stereoscopic images and how to obtain the best use of them. Finally, the computational requirements are analysed and some hardware solutions are proposed.
9h45m - High Performance Cluster Computing (34-HPCC.zip)
Luís Filipe Brito
Abstract: Advances in communication technology, both in hardware and protocols, led to fast interconnect links among computing systems, and further to a cluster system. These clusters follow the MIMD paradigm; they have advantages over traditional symmetric multiprocessor systems - namely on hardware and development systems availability, and fault-tolerance - and over network computing, due to the flexibility of node interconnection. Cluster systems may use several connection topologies, and they rely on hardware and software middleware to provide a unified system view and high system availability.
Session 4
Mobile Computing
Chairman: João Luís Sobral
10h00m - DSP Architecture for Mobile Communications (41-DSPmob.zip)
José Balão
Abstract: The DSP processor is the most important component on a digital mobile cellular handset. It is a very specialised processor that directly reflects the type of operations needed in processing speech, as in other real-time numerically intensive processing applications. The architecture of such processors is presented in this paper, with strength on features that most distinguishes them from the general-purpose ones.
10h15m - New Trends in Mobile Computing Architecture (42-MobComp.zip)
António Miguel Cruz
Abstract: The increasing nomadicity of our society places new challenges to the hardware design of mobile computers. This communication introduces the subject and identifies the main requirements of mobile stations, namely portability, mobility and wireless communications. It then focuses on the architectural issues of these mobile computers with a brief overview on the main features of Digital Signal Processors for control signalling in mobile digital networks.
10h30m - Real Time Computing in Archaeology Digging (43-RTCArchaeol.zip)
José Pedro Morais
Abstract: This communication analyses the technologies that can be used to integrate the local computing needs in archaeology digging, namely those required to transmit data co-ordinates and data objects information in real time to a central server outside the camp, and to centrally process data and to send it back to be visualised on the mobile computer. It provides a view of how GPS and GSM technologies work and how they can be adequately used in archaeology.
ICCA'2000 is back again, for the second time! As before, it is a simulation of an International Conference - after all it is just an Intern(ation)al Conference - which aims several goals in just one package: (i) to motivate M.Sc. students (on Informatics, at Univ. Minho, 1999/00) with different backgrounds on computer architecture, for this subject that I was supposed to lecture; (ii) to bring into the classroom the skills these already graduated students had acquired in their professional activities, integrating them into the common theme of a computer architecture and/or organisation; (iii) to prepare the students to go deep into one specific topic - including the bibliographic search, state of the art review and synthetic writing of a scientific theme - while at the same time opening their minds into other relevant and updated issues in computer architecture - by listening to the oral presentation of their colleagues and by having access to the conference proceedings; and (iv) to stress the relevance of a quality driven professional communication - both written and spoken - of a scientific subject.
To take advantage of our past experience in the organisation of a similar event in the previous academic year, deadlines were kept - to deliver their communication proposals (in English) for external evaluation, and for these to mark and comment the quality of the papers - and those who managed to deliver the work on time, their main reward lie on both a paper and an electronic version of the ICCA'2000 Proceedings (Web page in http://gec.di.uminho.pt/discip/minf/ac9900/icca2000.htm). I am thankful to my departmental colleagues who acted as external referees and session chairmen, namely António Pina, João Luís Sobral, João Miguel Fernandes and Luís Paulo Santos.
As before, I was impressed with the quality of some communications on the 1st day; the overall quality of the written articles can also be considered very good, specially when we know that the previous background on Computer Architecture of most students was very close to null! Congratulations to everyone!
Braga, 11th January 2000
Alberto José Proença
PS. Come and visit also ICCA'99!
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